[luau] Hyper technology

[Jimen Ching]

On Mon, 30 Dec 2002 bob at atl.org wrote:
>does PPC offer any advantages in the area of context switching
>(over various x86 implementations)?

Probably not.  The x86 context switch is pretty fast.  So I doubt the PPC
has any advantages in this area.

>is there a good comparison of processors (benchmark) site
>that lists L1 cache(s) sizes L2 cache sizes, speeds, association schemes
>and other processor charatracteristics in addition to the part
>number or brand name and speeds?

I would imagine the results of such comparisons would be proprietary
information.  After all, someone with such knowledge would be able to
design a better CPU.  Also, each of these parameters are affected by the
depth of the pipeline.  So it is useless unless you specify the pipeline
depth.

>I ask because I'm shopping for a new laptop and
>past experience (purely subjective) is that I'm much happier
>with larger L1 program and instruction caches than these blazing

The L1 cache is very fast.  This means it is very expensive.  This is why
CPU designers try to select the best L1 and L2 cache size to obtain the
best performance.  With a given CPU speed and pipeline depth, there is a
rate at which data is needed from memory.  You need a large enough L1
cache to keep the pipeline moving.  Any larger, and you're just wasting
money.

>clock numbers. This, and the SPARC processors seem to handle a large
>number of processes better than the intel for a given clock speed...
>Not that I expect to find a price/performance competitive
>notebook with SPARC :-)

I believe the fast context switching time in the SPARC is the result of
the register file design.  On the PPC and IA-32, context switching just
loads the CPU registers from a specific memory location.  In the SPARC,
there is this ring design which stores the CPU state.  So there is no
external reference to memory.  Of course, this is based on information I
learned from a course at UH 7 years ago.  So it may be out of date now.

--jc
-- 
Jimen Ching (WH6BRR)      jching at flex.com     wh6brr at uhm.ampr.org